Electronic Packaging: Design, Materials, Process, and Reliability
J. Lau, C. P. Wong, J. L. Prince, and W. Nakayama
McGraw-Hill, Washington, D.C., 1998
The ever-increasing pin counts and clock speeds of modern electronics continue
to "push the performance envelope" with regard to designing packaging and
interconnection solutions that can meet such increasingly challenging requirements.
The fast SRAMs for cache memories need to perform at near-microprocessor
speeds to prevent data bottlenecks. ASICs are expected to run faster
than 200 MHz on-chip clock frequency and have up to 900 package pin counts
-- and, for many telecommunication products, even more.
Here's the help you need! For the first time, four well-known experts representing
the four relevant fields -- mechanical engineering, electrical engineering,
thermal management, and materials -- team up to provide a single-volume
comprehensive reference that explains packaging and interconnection basics,
details design tradeoff considerations, and presents specific system-level
solutions. This unprecedented and unsurpassed multi-disciplinary
coverage not only includes all the new technologies -- BGA, Flip Chip,
DCA, and CSP -- it shows how they can be most effectively integrated.
Among the topics explored:
With its clear explication of both theoretical and practical issues, Electronic
Packaging will be of considerable and continuing value for any professional
seeking to design and/or refine more reliable, robust, and cost-effective
packaging solutions for virtually any interconnect system.
How to design, analyze, and measure electronic packaging and interconnections
Basic electrical and heat transfer effects and how to accommodate them
Thermal, electrical, and mechanical analysis and design techniques
What causes stresses and strains and how to reduce them
Currently used and advanced materials and processes
April 1998, 498 pages, ISBN: 0-07-037135-0
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