Created: 07/27/00 |
Cho, James (M.S. Mechanical Engineering)
Accelerated Thermomechancial Qualification of an Automotive Electronic Module
In this study, an accelerated qualification methodology is demonstrated for a functional automotive electronic controller, using a 5-step physics of failure (PoF) approach. The product consists of a single circuit board assembly in a plastic housing. This product is selected because it has already undergone extensive PoF analysis at the sponsor's site, using CalcePWA® software. Combined vibration and thermal cycling stresses are used in the accelerated stress testing, to represent the life cycle environment.
The mounting fixture setup is designed by the sponsor to simulate the mounting transmissibilities in the use environment. The failure monitoring system is also designed by the sponsor for in-situ detection of any failures during the accelerated life testing (ALT). Preliminary vibration and thermal analysis is conducted to determine locations for vibration and thermal sensors. The specimen response is fully characterized and load profiles are selected for accelerated wear-out testing.? A total of four modules are subjected to the designed accelerated test load. During the test, the first three modules failed due to an irrelevant electrical overstress because the test equipment is not suitable for the power cycle history programmed by the sponsor. Corrective action is taken to resolve the problem by adjusting the supply power by connecting resistors, and by changing the test setup configuration, to continue the testing. Due to scheduling constraints, testing for the fourth module with the modified test setup is terminated after 328 thermal cycles with simultaneous vibration loads. No relevant electrical failures are observed, but visual indications of fatigue cracking are observed in the solder interconnects of several 0603 surface mount ceramic chip resistors.? Virtual testing reveals that the 0603 resistor interconnects are indeed the most vulnerable failure site, because of faulty bond pad design. Virtual qualification is conducted to estimate the acceleration factor for cyclic thermomechanical fatigue of the cracked interconnects under the chip resistor.? The damage induced by the vibration load is found to be negligible due to the rigid constraints imposed by the housing (see Appendix 11.9 for details of vibration analysis). Results indicate that the thermal cycling experienced by the cracked chip resistor interconnects during ALT is equivalent to?2.8 years of thermal cycling in the life cycle environment.? PoF simulations indicate that electrical failures are not likely to occur until 13 years of thermal cycling in the life cycle environment. ALT testing could not be continued or repeated for a statistically significant sample size, due to the time limitations in sponsor's product development schedule. Therefore, the main value of this study is in providing an example to demonstrate the PoF methodology for accelerated qualification of complex electronic modules.
Narayan, Raj (M.S. Mechanical Engineering)
Management and Decision Support for the Contract Manufacturing of Electronic Products
The growth in popularity of contract assembly outsourcing in the electronics industry and the absence of concrete procedures for the outsourcing process, form the motivation for this research work. Contract outsourcing involves the transfer of specific assembly activities related to a product or process from an OEM (Original Equipment Manufacturer) to a CA (Contract Assembler). This thesis presents industry outsourcing data from the top OEMs and CAs, step-by-step procedures for performing benchmarking and the management of the CA, the economics of outsourcing, and four case studies of large OEMs that have performed outsourcing of electronics assembly activities successfully.
Prior to the initiation of outsourcing, the OEM has to benchmark the available Contract Assemblers (CAs) and rank them for suitability based on specific products or processes that are to be outsourced. Sources of data for benchmarking, the types of benchmarking, and the benefits of benchmarking are discussed. A step-by-step procedure for the preparation to benchmark and metrics to be considered are provided. A detailed step-by-step procedure to carry out the benchmarking process has been developed based on interviews with leading OEMs.
A polygonal 2-dimensional quantitative model has been developed to help evaluate the best choice of CA along with weight values for each metric, making it sensitive to the benchmarking metrics. The economics of outsourcing is presented, along with the two primary methods of cost accounting used in the OEM industry, traditional cost accounting and activity based costing. Cost and other financial issues are discussed. Once the outsourcing decision is made and contract signed, the OEM has to manage the CA in order to ensure a mutually beneficial relationship. The management of the Contract Assembler comprises corporate issues like maintenance of the OEM-CA relationship, corporate culture, strategic partnerships and information technology to improve efficiency.
Case studies of leading OEMs - Microsoft, Nortel Networks, Lucas Aerospace and HighwayMaster are included based on information obtained through direct interviews with management at these companies and from supplemental information available in literature. These case studies aim at providing an OEM perspective to the benchmarking, economics and management issues involved in outsourcing. The Appendices provide data tables and case studies of customer service and accelerated change methodology, both important issues in Contract Management.
The contributions of this thesis include the integration of the outsourcing practices prevalent in industry, modifications to existing industry practices that prevent industry mistakes along with original ideas on making the outsourcing process procedural, in order to ensure the success of the OEM.
Okura, Juscelino Hozumi (Ph.D. Mechanical Engineering)
Assessment of Reliability of Low-cost Flip Chip Assembiles
Flip chip on board (FCOB) technology has gained importance with increasing demands on low cost, miniaturization and weight reduction of portable electronic products. Further, die real estate area can be significantly reduced compared to conventional packaged die and is very advantageous in high speed applications due to low interconnect inductance. Although the FCOB technology provides definite advantages over traditional surface mount technology components, reliability concerns have been raised due to a higher coefficient of thermal expansion (CTE) mismatch between the silicon die and the organic substrate. As a result, fatigue failures in visco-plastic interconnects, such as solder joints which are the most widely used FCOB interconnects, are a potential reliability hazard in surface-mount electronic packages under cyclic thermal and mechanical loading environments. Proper design and reliability assessment are thus crucial to ensure the fatigue endurance of FCOB electronic packages. Accurate modeling of damage within the solder joint under cyclic thermal and mechanical loading conditions is important not only to accurate predictions of fatigue life but also for designing fatigue resistant microstructures for new emerging solder compositions. In addition to modeling of damage within the solder joint, delaminations between the die passivation and underfill (electrical open due to separation at solder joint) are also a potential hazard. The proposed study is divided into two tasks: Physics of failure (PoF) analysis and experimantal investigation. The PoF analysis includes stress analysis that will provide information regarding the cyclic stress and strain histories at all potential failure sites and the damage model will use the results of the stress analysis to predict mean time to failure for each potential failure mechanism.
The two main objectives of the experimental work in this project are to observe potential failure mechanisms in flip chip devices, and to generate failure data to be used in the development of the analytical models. The experimantal analysis will be accomplished by temperature cycling and vibration test.
Pendsé, Neeraj (M.S. Mechanical Engineering)
Stress Balancing: A Method of uprating and Uprating Case Studies
The availability of electronic parts rated for operating temperature ranges wider than 0-70oC (commercial temperature range) is decreasing, as semiconductor manufacturers are driven by 'commercial' applications (e.g., computers). The need for parts for higher temperature applications is growing, for applications such as avionics, military and automotive electronics, although their market share is insignificant. Efforts are therefore underway to devise methods for using electronic parts outside the manufacturer's specified temperature ranges.
CALCE Electronic Products and Systems Center has developed three methods for uprating of electronic parts: parameter conformance assessment, parameter re-characterization and stress balancing. This thesis presents the 'stress balancing' method for electronic part use outside manufacturer's specified temperature range. Step-by-step approach for stress balancing has been presented, and "proof-of-concept" case studies for two parts are used to demonstrate these steps. In addition, this dissertation presents case studies of the parameter re-characterization, including tests conducted to demonstrate performance of the parts beyond the manufacturer's temperature specifications.
Sharma, Pradeep (Ph.D. Mechanical Engineering)
Micro-Structural Modeling of Cyclic Creep Damage in Tin-Lead Eutectic Solder
A cyclic creep damage cyclic creep damage model for eutectic alloys is developed from a micro-structural perspective, in order to provide a rational methodology for predicting creep-fatigue behavior based on the material morphology. This study focuses on Tin-Lead eutectic solder, but the formulation is generic enough to be easily extended to other emerging lead free and high temperature solder materials.
One of the major hurdles in creating an analytical micro-structural damage model for heterogeneous materials like solder is the lack of an appropriate model to relate the overall or macro-scale far-field stress fields to local stresses at sites of micro-structural damage (i.e. void nucleation and growth sites). In this dissertation, an analytical micro-macro stress transition model is developed which takes into account the local micro-structure, interactions with second phase particles, grain boundary sliding in the Tin matrix and its blocking by equiaxed second-phase Lead particles, and diffusional relaxation for typical micro-structures encountered in Sn-Pb eutectic solder. Wherever possible, a mechanistic approach is followed. The micro-macro stress transition model is implemented not only for static creep conditions, but also for cyclic loading. New insights into creep-fatigue behavior of solder are obtained by combining the micro-macro stress transition model with appropriate void nucleation and growth models (based on the mechanisms of grain boundary diffusion and power law creep). In particular, micro- structural considerations are approximately incorporated in a model for void growth due to grain boundary sliding (as a suitable model is not available for this mechanism).
Most researchers use a-priori failure criteria or void coalescence rules as inputs to their damage law. In this dissertation, the failure criterion is mechanistically derived from principles of cavitation instability, and based on micro-structural processes such as degradation of material strength due to grain coarsening, constitutive softening and changes in yield strength due to increase in void fraction (due to cavitation).
The applicability of the complete micro-structural cyclic creep damage model for Pb-Sn eutectic solder model is demonstrated for a simple thermo- mechanical example representative of actual solder joint behavior in real life applications. New insights into the dependence of damage behavior of solder on the micro-structural features of are obtained from systematic parametric studies. Such information provides materials engineers with crucial information for optimizing the microstructures of new solders.
Based on the developed micro-structural cyclic creep damage model, suggestions are provided for the development of better macro-scale or phenomenological models which can be used for engineering applications, such as designing robust solder interconnects for micro-electronics applications; virtual qualification of reliability through simulation and predictive analysis; better design of accelerated life tests; and life consumption monitoring.
Shetty, Santosh (M.S. Mechanical Engineering)
Effect of Cyclic Bending on Chip Scale Package Assemblies
This research investigates the effect of bending loads on the reliability of 0.5mm pitch Chip Scale Package (CSP) assemblies on FR4 substrates. The substrates have rows of CSPs and are subjected to three-point bend loads. Overstress curvature limits are experimentally determined and used as curvature limits for cyclic bend tests. The test configuration is simulated using finite element modeling (FEM) and the total strain accumulated in the solder joints is observed. Using the FEM model, a calibration curve is constructed to relate the substrate curvature range to the cyclic strain range observed in the critical solder joint. Bending moments along the substrate are estimated from the forces applied at the center of the board during the fatigue test. Strains measured on the substrate surface and the bending displacements measured at the center are used to estimate curvatures at different locations along the substrate. Using the calibration curve, the total strains in the solder joint are obtained for the applied loading. A strain-range fatigue damage model proposed by Coffin and Manson, is used to predict the cycles to failure for the applied loading. Predicted durability is compared to experimental measurements. Finite element simulations are repeated for life cycle loading to predict acceleration factors. Using the acceleration factors, the product durability is estimated under life cycle loads. The report is presented in the format of a five-step accelerated qualification project.
Subrahmanyam, Rajiv (M.S. Mechanical Engineering)
The Economic Impact of Component Replacement in Electronic Systems
A significant contributor to the life cycle cost of long-life electronic systems is sustainment. Sustainment includes repair or replacement of critical components within the system, managing obsolescence, performing redesigns and reorders. Conventional methods of determining the sustainment costs focus on unscheduled maintenance. The modern approach to dealing with sustainment focuses on scheduled maintenance, meaning that components are replaced at predetermined dates before they fail.
This thesis describes a methodology and implementation for predicting the system sustainment cost, given system and component-level reliability (Failure Free Operating Period (FFOP) with associated confidence level) and obsolescence details. The basic steps in the methodology are:
The methodology has been implemented in Java. The primary use of the methodology/tool is the prediction of the effect of various system parameters and management decisions on the sustainment cost at the design stage, and the generation of a maintenance schedule that can be transferred to a broader life cycle cost analysis environment
Trichy, Thiagarajan (M.S. Mechanical Engineer)
Full Monte Carlo Technical Cost Modeling with Detailed Test/Rework Analysis for Inclusion in a Multi-Attribute Optimization Environment
The use of solid-state modules for power conversion and distribution has the potential to significantly improve the efficiency and performance of power electronic products. While many argue that the performance is more important in the design phase, one must be aware that cost is very dependent on the product design. In fact, up to 80% of the cost of a product is committed in the design phase. If design is based primarily on performance, one may discover, after design decisions are made, that a minor modification might have lowered the cost significantly without an appreciable degradation in performance.
This thesis describes the development and implementation of a technical cost model in a software tool for predicting the manufacturing cost and yield of an electronic system. Process-flow based cost modeling has been used in the model with Monte Carlo analysis to account for the uncertainties in the input data. An unique feature of this model is the use of a detailed test/rework economics model. This includes the ability to model multiple rework loops, use of fault coverage and false positives. The cost model has been integrated with other models (reliability assessment model and a thermal analysis model). All the models are united by a commercially available interface that facilitates multi-objective design optimizations. The primary use of this modeling system is in evaluating alternative process methods and design technologies. The application of this methodology enables quick access to decision-level data resulting in higher quality systems at lower cost.
Xie, Jingsong (Ph.D. Mechanical Engineering)
Characterization of Conductive Elastomer Button Style Integrated Circuit Component Sockets
In certain applications of electronic manufacturing, direct soldering of integrated circuit components and other electronic packages may lead to cost, quality (e.g. reliability of solder joints), and feasibility concerns,for example. In many cases, sockets can provide an effective alternative.
The development of socket technologies in recent years shows that elastomer style contact technologies may be increasingly useful for socketing high-density leadless packages. Two different mechanical structures have been developed in parallel for mounting a BGA/LGA/CGA component with a socket. One type is the one-piece elastomer sheet style and the other the conductive elastomer button style.
This proposal consists of two chapters. The first chapter reviews
integrated circuit component socket development in the 1990s and
illustrates the advantages of socket selection as opposed to direct solder
connections in certain applications. The classification of component
sockets, based on applications and contact technologies, is discussed, and
socket technology development trends and challenges facing socket
designers are introduced. The second chapter introduces the Sun
Microsystems elastomer button BGA sockets we are testing, and reports the
experimental results we have obtained so far. A proposal for the
next-stage study is presented and the experiment details are discussed.