Yan Ning, Michael Azarian, Member, IEEE, and Michael Pecht, Fellow, IEEE
CALCE, Department of Mechanical Engineering, College Park, MD, 20742
Abstract:The increase in the I/O density and the decrease in the size of electronic packages have driven the need for highdensity interconnect (HDI) circuit boards that use microvias as interconnects. One challenge for HDI circuit board development is to fabricate microvias without generating voids in deposited copper structures. A parametric study was conducted to investigate the effects of voids on the thermomechanical reliability of copper-filled stacked microvias using 3-D finite-element analysis and strain-based fatigue life estimation. It was found thatmicrovia fatigue life was affected by geometrical void characteristics, such as shape, size, and location; microvia aspect ratio; and dielectric material properties. While voids are defects in copper-filled microvias, the existence of voids is not always detrimental tomicrovia reliability. For example, a microvia with a spherical void of 8% volume ratio had a 10%longer fatigue life than the same microvia without voiding. On the other hand, large voids decreased the durability of microvias—a 16%conical void resulted in a microvia fatigue life that was only 1.4% of that of a nonvoided microvia. Moreover, microvia aspect ratio is a critical parameter for reliability. The fatigue life of a voided microvia of 0.25 aspect ratio was more than two orders of magnitude longer than the fatigue life of a voided microvia of 0.75 aspect ratio with the same void volume ratio. As an outgrowth of this study, a microvia virtual qualification method is proposed. Using a combination of finite-element analysis and fatigue life prediction, the required amount of HDI board reliability testing is reduced, cutting overall development time and cost.
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