Elviz George1, Michael Pecht1, Michalel Osterman1, Richard Coyle2, Richard Parker3 and Elizabeth Benedetto4
1Center for Advanced Life Cycle Engineering, University of Maryland, College Park, MD 20742, United States
2Alcatel Lucent, Murray Hill, New Jersey
3Delphi, Kokoma, Indiana
4Hewlett-Packard Co, Houstan, Texas
Abstract:
Sn-3.0 Ag-0.5Cu (SAC305) alloy is the most widely used solder in electronic assemblies. However, issues associated with cost and drop/ shock durability have resulted in a search for alternative lead-free solder alloys. One approach to improve the drop/shock reliability has been to reduce the silver content in Sn-Ag-Cu alloys. Another approach is doping Sn-Ag-Cu solder with additional elements. In 2008, the International Electronics Manufacturing Initiative (iNEMI) started the ‘Characterization of Pb- Free alloy Alternatives' project to provide a comprehensive study of 15 tin based solder interconnect compositions benchmark against the eutectic tin-lead solder. For this study temperature cycle durability was the primary focus and solders were selected to study the effect of varying silver content, micro-alloy additions and ageing. This papers reports findings from one of the test conditions conducted under the iNEMI project. The cycles to failure for a temperature cycling test conditions from -15 degree C to 125 degree C, with dwell times of 60 Min at both extremes, are presented. The test assembly consisted of 16 of the 192 I/O BGAs and 16 of the I/O BGAs soldered onto an LG451HR laminate. Test results revealed that the reduction of silver resulted in a reduction cycles to failure. In all cases, the 15 tin based solders were more durable than eutectic SnPb solder. Ageing at 125 degree C for 10 d did not effect the cycles to failure SAC105 solder; however, the cycles to failure decreased with ageing in SAC305 solder. In addition, ageing resulted in a wider distribution of cycles to failure in 192 I/O BGAs. Failure analysis was carried out on all solder materials to identify the failure site and failure mode.
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