Driven by legislative requirements and market forces, the electronics industry has widely adopted pure (matte) tin and high tin alloy finishes as Pb-free alternatives [1]. However, the adoption of high-tin content finishes has created a reliability concern pertaining to the formation of conductive tin whiskers, which can bridge adjacent conductors and lead to current leakage and electrical shorts.

It is widely believed that compressive stress, generated within the tin plating, is a necessary but insufficient factor influencing tin whisker growth. The internal compressive stresses come from electroplating processes [4, 5], from substrate formation [6,7], from surface damages [6], from the mismatch in the coefficients of thermal expansion (CTE) [8], or from an irregular growth of intermetallic compounds (IMC) [9]. These whiskers can be formed »spontaneously« without any external force.

Whiskers can also be induced by pressure, which accelerates the growth of tin whiskers [10]. In the case of fine-pitch connectors with pure tin or high tin alloy finishes, mating pressure between the connector elements can produce pressure-induced tin whiskers as shown in Figure 1. Fisher et al. concluded that the growth rate is proportional to the pressure based on diffusion theory. Since stresses in the plating increase with pressure, the atom transport that forms tin whiskers is accelerated by the gradient of stresses.

This paper provides a fundamental assessment of pressure-induced tin whisker formation in microelectronics. A creep-based tin whisker model is proposed to explain experimental data. Stress evolution in the plating of electronics components was assessed by the finite element analysis (FEA). A grain boundary diffusion model was used to predict the maximum whisker length.

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