Abstract:

Printed circuit board (PCB) specimens containing three different IPC-B-25 test structures were exposed to temperature-humidity-bias conditions in order to evaluate the effects of no-clean flux chemistry, conductor spacing, voltage bias, and test environment on surface insulation resistance (SIR). Comb patterns on the PCBs were coated with a eutectic (63Sn/37Pb) solder applied by a hot air solder leveling and processed by using no-clean aqueous-based and rosin-based fluxes. The SIR failure rate with rosin-based no-clean flux was observed to be greater than that with aqueous-based no-clean flux. This was explained by the more corrosive nature of the flux residues and the larger concentration of hygroscopic weak organic acids in the rosin-based flux residues. A characteristic of the SIR failures for PCBs processed with rosin-based flux was a series of intermittent SIR drops, which could severely affect the reliability of electronic assemblies. It was hypothesized that flux residues combined with adsorbed moisture from the environment form an acidic medium, occasionally breaking through the tin oxide passivation layer on the electrodes. Penetration of the passivation layer combined with conductive flux residues bridging the electrodes caused the resistance to decrease, and rehealing of the passivation layer resulted in the intermittent behavior. Conductor spacing was observed to represent a factor in the electrochemical migration process that is independent of electric field. Since conductor spacings in electronic products continue to decrease, the experimental results support recommendations to replace 25-mil (0.64-mm) comb structures on industry standard test boards with those having smaller spacings, below 12.5 mil (0.32 mm), that accurately reflect the greater risk for SIR drops of today’s higher density assemblies.