D. Farley and A. Dasgupta
CALCE EPSC
University of Maryland,
College Park, MD 20742 USA
J. Caers
Philips Electronics Singapore
Centre for Industrial Technology (CFT)
Abstract:
This study aims to establish a global-local modeling methodology for determining the residual contact stress developed during fabrication of flip-chip-on-flex (FCOF) microelectronics systems. The assembly consists of a silicon die with gold bumps bonded with a non-conductive adhesive (NCA) on to gold-plated copper bumps on a flex substrate. Manufacturing variabilities cause a nonuniformity in the bump heights, leading to some bumps that are "tall" and some that are "short." The fabrication process needs to achieve a significant amount of compressive initial contact stress in all the bumps, to achieve an acceptable level of electrical contact resistance. Furthermore, this stress level forms the initial condition for cyclic relaxation of the stress (and corresponding progressive loss of contact resistance) due to temperature cycling throughout the life cycle of the assembly. A key issue to be investigated is the nonuniformity of the contact stresses due to the variabilities in the height of the metal contact bumps.
The entire bonding process is modeled with a global-local model to reduce the computational complexity. The results of the global model serve as the input for the local model.
Key findings include: the accuracy of the simulation is very sensitive to the accuracy of the gold and flex constitutive models used; the inclusion of viscoelastic properties for the epoxy has a significant effect on simulations; and better stress development comes from a higher concentration of short bumps than tall bumps.
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