J. Varghese and A. Dasgupta
CALCE Electronic Products and Systems Center
University of Maryland
College Park, MD 20742
This paper introduces a test methodology to examine the durability of surface mount interconnects under impact loading when a portable electronic product is dropped. Conventional testing approaches that consider the magnitude of loading (total impact energy, impact direction, and number of impacts) as the governing criterion for damage accumulation, typically report difficulties in correlating with impact durability under field conditions. This study considers the specimen response near the failure site as the governing criterion. For example, impact damage accumulated in Surface Mount Technology (SMT) interconnects are quantified in terms of local Printed Wiring Board (PWB) flexural strain, strain rate and rigid body acceleration. This approach is based on the hypothesis that interconnect damage is due to PWB flexure as well as inertial forces. The advantage of this approach is that the resulting damage models are applicable across different structures and loading. An instrumented, repeatable impact test setup is developed. The design space, in terms of PWB curvature, curvature rate and acceleration, is covered by varying impact orientation, loading and boundary conditions. The resulting test matrix is replicated twice for proof of consistency of the test data. A damage quantification technique is proposed based on the measured histories of PWB flexure and rigid body acceleration near the critical interconnects. This technique uses time-frequency decomposition and cycle counting. The validity of this metric is demonstrated for simple impact loading conditions on specimens that are constrained to have no rigid body motion. Unconstrained specimens exhibit complex responses and are deferred to a future study.
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