Proceedings of IPACK 03: International Electronic Packaging Technical Conference and Exhibition, July 6-11, 2003, Maui, Hawaii, USA

Surface Finish Effects on High-Speed Interconnects

Xin Wu and Michael Ramahi
CALCE Electronic Products and Systems Center
University of Maryland
College Park, MD 20742

Gary A. Brist
Intel Corporation
Hillsboro, OR 97006

Donald P. Cullen
MacDermid Inc.
Waterbury, CT 06702


In printed circuit boards (PCB), the selection of surface finish is a balance of cost, performance and material compatibility consideration. When the operating frequency is in gigahertz range, the signal loss in interconnects has stronger dependence on the material composition of traces, surface finishes, substrates, and geometry of the traces. Skin effects, frequency dependent dielectric properties and the electrical functioning mechanism are important factors that affect signal integrity. In this work, both measurements and finite element method (FEM) based full wave simulation are used to investigate the effects of hot air solder leveling (HASL) and its alternatives on signal degradation of high-speed interconnect structures. For the microstrip line structure, the loss due to surface finishes is negligible. For the differential mode coupled microstrip lines, the loss increment resulted from surface finish can be up to 50%~200% at 10 GHz. Surface finish caused signal loss must be carefully considered for differential mode interconnects.

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