Abstract:

With the advent of lead-free soldering, it is important to understand the effects of this new assembly process on the reliability of electronic packaging structures. The new materials and higher reflow temperatures used in lead-free soldering raise issues of materials and process compatibility with existing package materials. New materials may be required to be selected as die attaches, component encapsulants, lead finishes, board materials, and board platings to be compatible with lead-free soldering. In particular, new high temperature lead-free and lead-containing die attach materials may be needed in power electronic devices to withstand the higher soldering temperatures. However, little information is available in the literature on the fatigue properties of thin films of these materials. Such information is critically needed to evaluate the lifetime of power electronic modules. In this paper, we will discuss analytical, semi-analytical, and numerical methods for assessing the fatigue behavior of large area solder die attaches of these new materials, and the experimental validation of these methods against thermal cycle testing. Keywords: Physics-of-failure, die attach, power electronics, lead-free solder, fatigue.

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