IEEE Transactions on Electronics Packaging Manufacturing, Vol. 24, No. 3, pp. 195-202, July 2001.

On the Use of Yielded Cost in Modeling Electronic Assembly Processes

Daniel Becker and Peter Sandborn

CALCE Electronic Products and Systems Consortium
University of Maryland
College Park, MD 20742


Yielded cost is defined as cost divided by yield. In electronic assembly, yielded cost represents the effective cost per good (non defective) assembly for a manufacturing process. Although yielded cost is not a new concept, it has no consistent definition in engineering literature, and several different formulations and interpretations exist in the context of electronic system fabrication and assembly.

This paper reviews and correlates existing yielded cost formulations for finding step yielded costs and presents a new method that enables consistent measurement of process flows including sequential processing steps and test/rework operations. This new method views step yielded cost as the change in process yielded cost when the step is removed from a process. This approach is preferred because it provides an effective cost per good assembly that incorporates upstream and downstream information and is independent of step order between steps that scrap defective product (i.e., test steps).

This paper guides the reader through simple and complex assembly process examples to demonstrate the interpretation of yielded cost. Test and diagnosis/rework issues are addressed and relevant equations are derived. Finally, the relevant approaches are applied to a surface mount assembly process example.

Complete article is available to CALCE Consortium Members

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