IEEE Transactions on Electronics Packaging Manufacturing, Vol. 24, No. 3, pp. 203-213, July 2001

Application-Specific Economic Analysis of Integral Passives in Printed Circuit Boards

Peter A. Sandborn, Bevin Etienne, and Gowrishankar Subramanian

CALCE Electronic Products and Systems Consortium
University of Maryland
College Park, MD 20742


This paper presents an application-specific economic analysis of the conversion of discrete passive components (resistors and capacitors) to integral passives that are embedded within a printed circuit board. In this study we assume that integral resistors are printed or plated directly onto wiring layers (as opposed to requiring a dedicated layer), that bypass capacitors, if present, are embedded by dielectric substitution into existing reference plane layers, and that singulated non-bypass capacitors, if present, are embedded using dedicated layer pair addition. The model presented performs three basic analyses: 1) Board size analysis is used to determine board sizes, layer counts, and the number of boards that can be fabricated on a panel; 2) Panel fabrication cost modeling including a cost of ownership model is used to determine the impact of throughput changes associated with fabricating integral passive panels; and 3) Assembly modeling is used to determine the cost of assembling all discrete components, and their associated inspection and rework. The combination of these three analyses is used to evaluate size/cost tradeoffs for several example systems including the NEMI hand-held emulator, a picocell board, and a fiber channel card.

Complete article is available to CALCE Consortium Members

© IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.

[Home Page][Articles Page]