Product Integrity and Reliability in Design, Chapter 8, pp. 204-232, Edited by Evans, J. W. and Evans, J. Y., Springer-Verlag London Limited, 2001

Failures in Electronic Assemblies and Devices

Michael Pecht, Patrick McCluskey, Jillian Evans
CALCE Electronic Products and Systems Consortium
University of Maryland
College Park, MD 20742


Electronic assemblies consist of a hierarchy of interconnection as we see in Figure 8.1. Semiconductor devices, the chips or die, are most often packaged in plastic encapsulation and soldered to a printed wiring board. The board provides the supporting structure for the parts and the surface area necessary for the circuit. This interconnect structure may present many reliability issues for products and electronic systems. In this chapter, we continue to build our knowledge of the mechanics of failure, applying much of Chapters 4, 5, 6, and 7 to electronic assemblies and devices.

Once again, lets look at the packaging hierarchy shown in Figure 8.1. The lowest level consists of the semiconductor device itself, referred to as the chip or die. The enclosure for the chip may be a hermetically sealed package, often employed in low volume, high reliability systems. Most products, however, use plastic encapsulated microcircuits where the chip or die is encase in plastic epoxy molding compound. When performance and size combine to become dominant design issues, multichip modules or hybrid circuits can be used, as an intermediate level of packaging. In either case, the die is bonded to the packaging and electrical interconnection between the die and the package is most often done by using wire bonding. The final interconnection is between the packaged device and the printed wiring assembly. Soldering remains the most often used process and eutectic or 60/40 tin lead solder the media of choice to achieve interconnection at this level.

Complete article is available to CALCE Consortium Members.

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