Abstract:

This paper summarizes an application-specific economic analysis of the conversion of discrete passive resistors and capacitors to passives that are embedded within a printed circuit board, i.e., integral substrates. In this study we assume that embedded resistors are printed or plated directly onto wiring layers (as opposed to requiring a dedicated layer), that bypass capacitors are embedded by dielectric substitution into existing reference plane layers, and that singulated non-bypass capacitors are embedded using dedicated layer pair addition. The model performs three basic analyses: 1) Board size analysis is used to determine board sizes, layer counts, and the number of boards that can be fabricated on a panel; 2) Panel fabrication cost modeling including a cost of ownership model is used to determine the impact of throughput changes associated with fabricating integral substrates; and 3) Assembly modeling is used to determine the cost of assembling all discrete components, and their associated inspection and rework. The combination of these three analyses has been used to evaluate size/cost tradeoffs for an example
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