Adapted from the 1995 book, Modeling of Electrical Overstress in Integrated Circuits.

Tutorial - Electrical Overstress and Electrostatic Discharge

C. Diaz, S. Kang and C. Duvvury


Summary and Conclusions- Semiconductor devices have a limited ability to sustain electrical overstress (EOS).  The device susceptibility to EOS increases as the device is scaled down to submicron feature size.  At present, EOS is one of major causes for IC failures.  Published reports indicate that nearly 40% for the IC failures can be attributed to EOS events.  Hence, it is imperative to account for EOS threats early in the design process.  For semiconductor devices, EOS embodies a broad range of electrical threats due to electromagnetic pulses (EMP), electrostatic discharge (ESD), system transients, and lightning.  EOS-related failures in semiconductor devices can be classified according to their primary failure mechanisms into: thermally-induced failures, electromigration, and electric-field-related failures.  In general, thermally-induced failures are related to the doping level, junction depth, and device characteristic-dimensions whereas electric-field induced failures are primarily related to the breakdown of thin oxides in MOS devices.

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