Modern electronic packages are required to function under severe environments where temperatures can range form ?5ºC to 125ºC.  Severe temperature cycling between power off and power on conditions can lead to an early failure of solder joints.  Many empirical and mathematical models based on stress, strain, fracture mechanics, strain range partitioning etc. are available to find the fatigue life.  A new strain energy-partitioning model is used in this paper and is felt to more accurately predict the response of the solder.  The strain energy partitioning model is used to determine the potential crack initiation sites and then the model is extended to follow these cracks as they propagate through the solder joint.  A 40 lead, 20 mil pitch TSOP is used as an example application of the method and the results are favorably compared with experimental data.  The local CTE mismatch between the lead-solder interface and the PWB-solder interface is found to significantly affect the fatigue life.  This local CTE mismatch has raised reliability concerns that were previously not considered to be a dominating issue.
 

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