Abstract:

The passive cooling, including the transient start-up process, of a leadless chip carrier package mounted on a vertical substrate in a liquid filled cubic enclosure is investigated numerically.  A relatively detailed thermal model of the electronic package is included.  The governing three-dimensional unsteady equations for natural convection within the fluid and for the coupled heat conduction in the package are solved numerically using a finite difference method.  The transient heat up of the system can be characterized by four stages: 1) initial heat up of the chip with some conduction through the package and the surrounding fluid; 2) increased conduction characterized by symmetric thermal spreading through the substrate, accompanied by the development of the natural convection flow field; 3) increased convection effects, as the buoyant driving force reaches its peak level, leading to asymmetric spreading through the substrate and a strong plume above the package; 4) gradual approach to steady state as the fluid in the enclosure is slowly heated, with reduced buoyant driving force and hence decreasing  velocities.  Steady-state conditions are characterized by thin boundary layers along the hot and cold surfaces, well-stratified temperature in the core, a strong plume above the package, and oval shaped isotherms along the substrate surface.  With FC-75 as the coolant, a large fraction of the heat generated in the chip is conducted to the substrate and then transferred to the fluid, due to the high thermal conductivity of the substrate relative to that of the fluid.  Even when the upper lid of the package is removed, exposing the chip directly to the fluid, the chip temperature drops only by 5 percent, indicating the importance of substrate conduction.  Use of a chip that has twice that cross-sectional area as the base case results in a 25 percent drop in chip temperature, with little effect on the remainder of the flow.  When water is used as the coolant instead of FC-75, the non-dimensional temperature of the chip increases, due to the lower Rayleigh number and lower ratio of substrate-to-fluid thermal conductivity.  In dimensional units, however, the actual chip temperature is 25ºC cooler.
 

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